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PIC16F946-E/MLQTP bảng dữ liệu(PDF) 58 Page - Microchip Technology |
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PIC16F946-E/MLQTP bảng dữ liệu(HTML) 58 Page - Microchip Technology |
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58 / 330 page ![]() PIC16F913/914/916/917/946 DS41250F-page 56 © 2007 Microchip Technology Inc. 3.4.3 PIN DESCRIPTIONS AND DIAGRAMS Each PORTB pin is multiplexed with other functions. The pins and their combined functions are briefly described here. For specific information about individual functions such as the LCD or interrupts, refer to the appropriate section in this data sheet. 3.4.3.1 RB0/INT/SEG0 Figure 3-9 shows the diagram for this pin. The RB0 pin is configurable to function as one of the following: • a general purpose I/O • an external edge triggered interrupt • an analog output for the LCD 3.4.3.2 RB1/SEG1 Figure 3-9 shows the diagram for this pin. The RB1 pin is configurable to function as one of the following: • a general purpose I/O • an analog output for the LCD 3.4.3.3 RB2/SEG2 Figure 3-9 shows the diagram for this pin. The RB2 pin is configurable to function as one of the following: • a general purpose I/O • an analog output for the LCD 3.4.3.4 RB3/SEG3 Figure 3-9 shows the diagram for this pin. The RB3 pin is configurable to function as one of the following: • a general purpose I/O • an analog output for the LCD FIGURE 3-9: BLOCK DIAGRAM OF RB<3:0> Q D CK Data Latch TRIS Latch RD TRISB RD PORTB Q D CK TTL Input Buffer SE<3:0> and LCDEN Data Bus WR PORTB WR TRISB P VDD I/O Pin Weak Pull-up SE<3:0> SEG<3:0> INT(1) RBPU Note 1: RB0 only. SE<3:0> and LCDEN VDD VSS WPUB<3:0> Schmitt Trigger SE0 and LCDEN |
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