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PIC16F946-E/MLQTP bảng dữ liệu(PDF) 217 Page - Microchip Technology |
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PIC16F946-E/MLQTP bảng dữ liệu(HTML) 217 Page - Microchip Technology |
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217 / 330 page ![]() © 2007 Microchip Technology Inc. DS41250F-page 215 PIC16F913/914/916/917/946 15.3 PWM Mode The PWM mode generates a Pulse-Width Modulated signal on the CCPx pin. The duty cycle, period and resolution are determined by the following registers: •PR2 •T2CON • CCPRxL • CCPxCON In Pulse-Width Modulation (PWM) mode, the CCP module produces up to a 10-bit resolution PWM output on the CCPx pin. Since the CCPx pin is multiplexed with the PORT data latch, the TRIS for that pin must be cleared to enable the CCPx pin output driver. Figure 15-3 shows a simplified block diagram of PWM operation. Figure 15-4 shows a typical waveform of the PWM signal. For a step-by-step procedure on how to set up the CCP module for PWM operation, see Section 15.3.7 “Setup for PWM Operation”. FIGURE 15-3: SIMPLIFIED PWM BLOCK DIAGRAM The PWM output (Figure 15-2) has a time base (period) and a time that the output stays high (duty cycle). FIGURE 15-4: CCP PWM OUTPUT Note: Clearing the CCPxCON register will relinquish CCPx control of the CCPx pin. CCPRxL CCPRxH(2) (Slave) Comparator TMR2 PR2 (1) RQ S Duty Cycle Registers CCPxCON<5:4> Clear Timer2, toggle CCPx pin and latch duty cycle Note 1: The 8-bit timer TMR2 register is concatenated with the 2-bit internal system clock (FOSC), or 2 bits of the prescaler, to create the 10-bit time base. 2: In PWM mode, CCPRxH is a read-only register. TRIS CCPx Comparator Period Pulse Width TMR2 = 0 TMR2 = CCPRxL:CCPxCON<5:4> TMR2 = PR2 |
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