PIC16F688-ESLASHST datasheet(83/174 Pages) MICROCHIP

83 / 174 page

 2004 Microchip Technology Inc.

Preliminary

DS41203B-page 81

PIC16F688

10.2

USART Baud Rate Generator

(BRG)

The BRG is a dedicated 8-bit or 16-bit generator, that

supports both the Asynchronous and Synchronous

modes of the USART. By default, the BRG operates in

8-bit mode; setting the BRG16 bit (BAUDCTL<3>)

selects 16-bit mode.

The SPBRGH:SPBRG register pair controls the period

of a free running timer. In Asynchronous mode, bits

BRGH (TXSTA<2>) and BRG16 also control the baud

rate. In Synchronous mode, bit BRGH is ignored.

Table 10-1 shows the formula for computation of the

baud rate for different USART modes, which only apply

in Master mode (internally generated clock).

Given the desired baud rate and FOSC, the nearest

integer value for the SPBRGH:SPBRG registers can be

calculated using the formulas in Table 10-1. From this,

the error in baud rate can be determined. An example

calculation is shown in Example 10-1. Typical baud

rates and error values for the various asynchronous

modes are shown in Table 10-2. It may be advanta-

geous to use the high baud rate (BRGH = 1), or the

16-bit BRG to reduce the baud rate error, or achieve a

slow baud rate for a fast oscillator frequency.

Writing a new value to the SPBRGH:SPBRG registers

causes the BRG timer to be reset (or cleared). This

ensures the BRG does not wait for a timer overflow

before outputting the new baud rate.

If the system clock is changed during an active receive

operation, a receive error or data loss may result. To

avoid this problem, check the status of the RCIDL bit

and make sure that the receive operation is IDLE

before changing the system clock.

10.2.1

SAMPLING

The data on the RC5/RX/DT pin is sampled three times

by a majority detect circuit to determine if a high or a

low level is present at the RX pin.

EXAMPLE 10-1:

CALCULATING BAUD

RATE ERROR

TABLE 10-1:

BAUD RATE FORMULAS

Note:

When BRGH = 1 and BRG16 = 1 then

SPBRGH:SPBRG values

≤ 4 are invalid.

For a device with FOSC of 16 MHz, desired baud rate

of 9600, Asynchronous mode, 8-bit BRG:

Solving for SPBRGH:SPBRG:

FOSC

Desired Baud Rate

---------------------------------------------

–

Desired Baud Rate

FOSC

64 [SPBRGH:SPBRG]

()

---------------------------------------------------------------------

16000000

9600

------------------------

–

25.042

[]

Calculated Baud Rate

16000000

64 25

()

---------------------------

9615

Error

Calc. Baud Rate

Desired Baud Rate

–

Desired Baud Rate

--------------------------------------------------------------------------------------------

9615

9600

–

()

9600

----------------------------------

0.16%

Configuration Bits

BRG/USART Mode

Baud Rate Formula

SYNC

BRG16

BRGH

8-bit/Asynchronous

FOSC/[64 (n+1)]

8-bit/Asynchronous

FOSC/[16 (n+1)]

16-bit/Asynchronous

FOSC/[4 (n+1)]

8-bit/Synchronous

16-bit/Synchronous

Legend:

= Don’t care, n = value of SPBRGH:SPBRG register pair

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