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TDA9321 bảng dữ liệu(PDF) 23 Page - NXP Semiconductors |
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TDA9321 bảng dữ liệu(HTML) 23 Page - NXP Semiconductors |
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23 / 44 page ![]() 1998 Dec 16 23 Philips Semiconductors Preliminary specification I2C-bus controlled TV input processor TDA9321H Signal on pin CCF Vi input voltage burst amplitude − 0.3 1.0 V Zi input impedance − 50 − k Ω Reference signal output (pin REFO); note 20 Vo(p-p) output signal amplitude (peak-to-peak value) CL = 15 pF 0.2 0.25 0.3 V VO(en) DC output level to enable comb filter 4.0 4.2 4.6 V VO(dis) DC output level to disable comb filter − 0.1 1.4 V Switching levels of SYS1 and SYS2 outputs (pins SYS1 and SYS2); note 21 VOH HIGH-level output voltage 4.0 5.0 5.5 V VOL LOW-level output voltage − 0.1 0.4 V Io(sink) output sink current 2 −− mA Io(source) output source current 2 −− mA DETECTION OF STATUS LEVELS OF SCART PLUG PIN 8; note 22 Vdet(int-ext) detection voltage between internal and external (16 : 9) source 2.0 2.2 2.4 V Vdet(ext-ext) detection voltage between external (16 : 9) and external (4 : 3) source 5.3 5.5 5.7 V Ri input resistance 60 100 − k Ω Chrominance and luminance filters and delay lines CHROMINANCE TRAP CIRCUIT; note 23 ftrap trap frequency fosc ±1% MHz during SECAM reception 4.3 ±1.5% MHz B−3dB −3 dB bandwidth fSC = 3.58 MHz 2.6 2.8 3.0 MHz fSC = 4.43 MHz 3.2 3.4 3.6 MHz during SECAM reception 2.9 3.1 3.3 MHz CSR colour subcarrier rejection 26 −− dB CHROMINANCE BAND-PASS CIRCUIT fc centre frequency bit CB = 0 − fosc − MHz bit CB = 1 − 1.1fosc − MHz Qbp band-pass quality factor − 3 − CLOCHE FILTER fc centre frequency 4.26 4.29 4.31 MHz B bandwidth 241 268 295 kHz SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT |
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