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DSPIC33FJ12MC02ESS bảng dữ liệu(PDF) 75 Page - Microchip Technology |
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DSPIC33FJ12MC02ESS bảng dữ liệu(HTML) 75 Page - Microchip Technology |
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75 / 284 page ![]() © 2007 Microchip Technology Inc. Preliminary DS70265B-page 73 dsPIC33FJ12MC201/202 REGISTER 6-7: IFS3: INTERRUPT FLAG STATUS REGISTER 3 R/W-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 U-0 FLTA1IF — — — — QEIIF PWM1IF — bit 15 bit 8 U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 — — — — — — — — bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15 FLTA1IF: PWM1 Fault A Interrupt Flag Status bit 1 = Interrupt request has occurred 0 = Interrupt request has not occurred bit 14-11 Unimplemented: Read as ‘0’ bit 10 QEIIF: QEI Event Interrupt Flag Status bit 1 = Interrupt request has occurred 0 = Interrupt request has not occurred bit 9 PWM1IF: PWM1 Error Interrupt Flag Status bit 1 = Interrupt request has occurred 0 = Interrupt request has not occurred bit 8-0 Unimplemented: Read as ‘0’ |
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