MCP3204-CISLASHP datasheet(14/34 Pages) MICROCHIP

14 / 34 page

MCP3204/3208

DS21298D-page 14

This diagram illustrates that the source impedance (RS)

adds to the internal sampling switch (RSS) impedance,

directly effecting the time that is required to charge the

capacitor (Csample). Consequently, larger source

impedances increase the offset, gain and integral

linearity errors of the conversion (see Figure 4-2).

4.2

Reference Input

For each device in the family, the reference input

(VREF) determines the analog input voltage range. As

the reference input is reduced, the LSB size is reduced

accordingly. The theoretical digital output code pro-

duced by the A/D converter is a function of the analog

input signal and the reference input, as shown below.

EQUATION

When using an external voltage reference device, the

system designer should always refer to the manufac-

turer’s recommendations for circuit layout. Any instabil-

ity in the operation of the reference device will have a

direct effect on the operation of the A/D converter.

FIGURE 4-1:

Analog Input Model.

FIGURE 4-2:

Maximum Clock Frequency

vs. Input resistance (RS) to maintain less than a

0.1 LSB deviation in INL from nominal

conditions.

Digital Output Code

4096

REF

---------------------------

VIN = analog input voltage

VREF = reference voltage

CHx

7pF

T = 0.6V

LEAKAGE

Sampling

Switch

S = 1 kΩ

SAMPLE

= DAC capacitance

= 20 pF

±1 nA

Legend

Signal Source

Ileakage

Leakage Current At The Pin

Due To Various Junctions

Rss

Source Impedance

Sampling switch

CHx

Input Channel Pad

Sampling switch resistor

Cpin

Input Pin Capacitance

Csample

Sample/hold capacitance

Threshold Voltage

0.0

0.5

1.0

1.5

2.0

2.5

100

1000

10000

Input Resistance (Ohms)

VDD = 5 V

VDD = 2.7 V

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