© 2007 Microchip Technology Inc.

DS21298D-page 3

MCP3204/3208

Analog Inputs

Input Voltage Range for CH0-

CH7 in Single-Ended Mode

V

Input Voltage Range for IN+ in

pseudo-differential Mode

IN-

—

Input Voltage Range for IN- in

pseudo-differential Mode

—

mV

Leakage Current

—

0.001

±1

µA

Switch Resistance

—

1000

—

Ω

See Figure 4-1

Sample Capacitor

—

20

—

pF

See Figure 4-1

Digital Input/Output

Data Coding Format

Straight Binary

High Level Input Voltage

——

V

Low Level Input Voltage

——

V

High Level Output Voltage

4.1

—

—

V

Low Level Output Voltage

——

0.4

V

Input Leakage Current

-10

—

10

µA

Output Leakage Current

-10

—

10

µA

Pin Capacitance

(All Inputs/Outputs)

——

10

pF

Timing Parameters

Clock Frequency

—

—

—

—

2.0

1.0

MHz

MHz

Clock High Time

250

—

—

ns

Clock Low Time

250

—

—

ns

CS Fall To First Rising CLK

Edge

100

—

—

ns

Data Input Setup Time

——

50

ns

Data Input Hold Time

——

50

ns

CLK Fall To Output Data Valid

—

—

200

ns

See Figures 1-2 and 1-3

CLK Fall To Output Enable

—

—

200

ns

See Figures 1-2 and 1-3

CS Rise To Output Disable

—

—

100

ns

See Figures 1-2 and 1-3

CS Disable Time

500

—

—

ns

D

—

—

100

ns

See Figures 1-2 and 1-3 (Note 1)

D

—

—

100

ns

See Figures 1-2 and 1-3 (Note 1)

Power Requirements

Operating Voltage

2.7

—

5.5

V

Operating Current

—

—

320

225

400

—

µA

Standby Current

—0.5

2.0

µA

ELECTRICAL SPECIFICATIONS (CONTINUED)

Parameters

Sym

Min

Typ

Max

Units

Conditions

Note 1: This parameter is established by characterization and not 100% tested.

3: Because the sample cap will eventually lose charge, effective clock rates below 10 kHz can affect linearity

performance, particularly at elevated temperatures. See Section 6.2, “Maintaining Minimum Clock Speed”,

for more information.