M65KA512AB datasheet(9/55 Pages) STMICROELECTRONICS

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M65KA512AB

Signal descriptions

9/55

Signal descriptions

See Figure 1: Logic diagram, and Table 1: Signal names, for a brief overview of the signals

connected to this device.

2.1

Address Inputs (A0-A12)

The A0-A12 Address Inputs are used to select the row or column to be made active. If a row

is selected, all thirteen A0-A12 Address Inputs are used. If a column is selected, only the ten

least significant Address Inputs, A0-A9, are used. In this latter case, A10 determines

whether Auto Precharge is used. If A10 is High (set to ‘1’) during Read or Write, the Read or

Write operation includes an Auto Precharge cycle. If A10 is Low (set to ‘0’) during Read or

Write, the Read or Write cycle does not include an Auto Precharge cycle.

2.2

Bank Select Address Inputs (BA0-BA1)

The BA0 and BA1 Banks Select Address Inputs are used to select the bank to be made

active.

The device must be enabled, the Row Address Strobe, RAS, must be Low, VIL, the Column

Address Strobe, CAS, and W must be High, VIH, when selecting the addresses. The

address inputs are latched on the rising edge of the clock signal, K.

2.3

Data Inputs/Outputs (DQ0-DQ15)

The Data Inputs/Outputs output the data stored at the selected address during a Read

operation, or are used to input the data during a write operation.

2.4

Chip Enable (E)

The Chip Enable input E activates the memory state machine, address buffers and

decoders when driven Low, VIL. When High, VIH, the device is not selected.

2.5

Column Address Strobe (CAS)

The Column Address Strobe, CAS, is used in conjunction with Address Inputs A0-A9 and

BA1-BA0, to select the starting column location prior to a Read or Write.

2.6

Row Address Strobe (RAS)

The Row Address Strobe, RAS, is used in conjunction with Address Inputs A0-A12 and

BA1-BA0, to select the starting address location prior to a Read or Write.

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