Data Sheet

LT3077

analog.com

Rev. 0

25 of 38

Three trilevel input pins, VO0, VO1, and VO2, select the output voltage. Table 6 illustrates the three-bit digital word-to-

output voltage relationship resulting from setting these pins high, low, or allowing them to float. An input logic low

state is guaranteed with less than 300mV referenced to GND, and a logic high state is guaranteed with greater than

1.97V. The range between 950mV to 1.15V defines the logic Hi-Z (input floating) state. These pins may be connected

high by strapping them to VBIAS or driving them with digital ports. Pins that float may either float or require logic that

has Hi-Z output capability. This allows the output voltage to be dynamically changed if necessary.

Table 6. VOUT Selection Matrix

VOUT (V)

VO2

VO1

VO0

0.50

0

0

0

0.55

0

0

Z

0.60

0

0

1

0.65

0

Z

0

0.70

0

Z

Z

0.75

0

Z

1

0.80

0

1

0

0.85

0

1

Z

0.90

0

1

1

0.95

Z

0

0

1.00

Z

0

Z

1.05

Z

0

1

1.10

Z

Z

0

1.15

Z

Z

Z

1.20

Z

Z

1

1.30

Z

1

0

1.40

Z

1

Z

1.50

Z

1

1

1.60

1

0

0

1.70

1

0

Z

1.80

1

0

1

2.00

1

Z

0

2.50

1

Z

Z

3.00

1

Z

1

3.30

1

1

0

4.20

1

1

Z

DO NOT USE

1

1

1

0 = Low, Z = Hi-Z (Float), 1 = High

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