AD7293BCPZ datasheet(13/79 Pages) AD

13 / 79 page

Data Sheet

AD7293

Rev. D | Page 13 of 79

ABSOLUTE MAXIMUM RATINGS

Table 9.

Parameter

Rating

±5 V Analog Output Pins (BI-VOUT0, BI-VOUT1,

BI-VOUT2, BI-VOUT3) to AVSS

AVSS − 0.3 V to

DACVDD-BI + 0.3 V

12.5 V Analog Output Pins (UNI-VOUT0,

UNI-VOUT1, UNI-VOUT2, UNI-VOUT3) to AGND

−0.3 V to

DACVDD-UNI + 0.3 V

12.5 V Supply (DACVDD-UNI) to AGND

−0.3 V to +15 V

2 V Analog Pins (REFADC, D1−, D1+, D0−, D0+)

to AGND

−0.3 V to +2 V

5 V Analog Pins (FACTORY TEST, VREFIN,

VREFOUT, VCLAMP0, VCLAMP1, VINx1) to AGND

−0.3 V to

AVDD + 0.3 V

5 V Digital Pins (GPIO5/SLEEP0,

GPIO6/SLEEP1, RESET, GPIO7/LDAC, CS,

DOUT) to DGND

−0.3 V to

VDRIVE + 0.3 V

5 V Open-Drain Pins (GPIO4/ALERT1, SCLK,

DIN, DVDD, GPIO3/ALERT0, GPIO2/BUSY,

GPIO1/CONVST, GPIO0/IS BLANK) to DGND

−0.3 V to +7 V

5 V Supply Pins2 (VDRIVE, DACVDD-BI, AVDD) to

AGND

−0.3 V to +7 V

−5 V Supply Pin (AVSS) to AGND

−7 V to +0.3 V

60 V Analog Pins (RSx−) to RSx+

(RSx+) − 0.3 V to

(RSx+) + 0.3 V

60 V Digital Pin (PA_ON) to AGND

−0.3 V to

PAVDD + 0.3 V

60 V Supply Pins (RSx+, PAVDD) to AGND

−0.3 V to

AVSS + 65 V

Ground Pins (DGND, AGND) to AGND

−0.3 V to +0.3 V

Operating Temperature Range

−40°C to +125°C

Storage Temperature Range

−65°C to +125°C

Reflow Profile

J-STD 20 (JEDEC)

Maximum Junction Temperature

150°C

ESD Rating, All Pins

Human Body Model (HBM)

2 kV

Field-Induced Charged Device Model

(FICDM)

1 kV

x = 0, 1, 2, or 3.

Connect AVDD and DACVDD-BI to the same potential.

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditions for extended periods may

affect product reliability.

THERMAL RESISTANCE

θJA is specified for a 4-layer JEDEC 2S2P type printed circuit

board (PCB) with a thermal via, that is, a device soldered in a

circuit board for surface-mount packages, per JESD51-7.

Table 10. Thermal Resistance

Package Type

θJA

θJC

Unit

56-Lead LFCSP

0.5

°C/W

ESD CAUTION

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