LTC3217

10

3217f

and Y5V capacitors may also have a very poor voltage

coefficient causing them to lose 60% or more of their

capacitance when the rated voltage is applied. Therefore,

when comparing different capacitors, it is often more

appropriate to compare the amount of achievable capaci-

tance for a given case size rather than comparing the

specified capacitance value. For example, over rated

voltage and temperature conditions, a 1

µF, 10V, Y5V

ceramic capacitor in a 0603 case may not provide any

more capacitance than a 0.22

µF, 10V, X7R available in the

same case. The capacitor manufacturer’s data sheet should

be consulted to determine what value of capacitor is

needed to ensure minimum capacitances at all

temperatures and voltages.

Table 2 shows a list of ceramic capacitor manufacturers

and how to contact them:

Table 2. Recommended Capacitor Vendors

AVX

www.avxcorp.com

Kemet

www.kemet.com

Murata

www.murata.com

Taiyo Yuden

www.t-yuden.com

Vishay

www.vishay.com

Layout Considerations and Noise

Due to its high switching frequency and the transient

currents produced by the LTC3217, careful board layout

is necessary. A true ground plane and short connections

to all capacitors will improve performance and ensure

proper regulation under all conditions.

The flying capacitor pins C1P, C2P, C1M and C2M will

have very high edge rate waveforms. The large dv/dt on

these pins can couple energy capacitively to adjacent PCB

runs. Magnetic fields can also be generated if the flying

capacitors are not close to the LTC3217 (i.e., the loop area

is large). To decouple capacitive energy transfer, a

Faraday shield may be used. This is a grounded PCB trace

between the sensitive node and the LTC3217 pins. For a

high quality AC ground, it should be returned to a solid

ground plane that extends all the way to the LTC3217.

The following guidelines should be followed when design-

ing a PCB layout for the LTC3217:

1. The Exposed Pad should be soldered to a large copper

plane that is connected to a solid, low impedance

ground plane using plated through-hole vias for proper

heat sinking and noise protection.

2. Input and output capacitors must be placed close to the

part.

3. The flying capacitors must be placed close to the part.

The traces from the pins to the capacitor pad should be

as wide as possible.

and handle high currents.

5. LED pads must be large and connected to other layers

of metal to ensure proper LED heat sinking.

Power Efficiency

To calculate the power efficiency (

η) of a white LED driver

chip, the LED power should be compared to the input

power. The difference between these two numbers repre-

sents lost power whether it is in the charge pump or the

current sources. Stated mathematically, the power

efficiency is given by:

η =

P

P

LED

IN

(5)

The efficiency of the LTC3217 depends upon the mode in

which it is operating. Recall that the LTC3217 operates as

detected at the LED pin. This feature provides the opti-

mum efficiency available for a given input voltage and LED

forward voltage. When it is operating as a switch, the

efficiency is approximated by:

η ==

=

P

P

VI

VI

V

V

LED

IN

LED

LED

BAT

BAT

LED

BAT

(•

)

(•

)

(6)

since the input current will be very close to the sum of the

LED currents.

APPLICATIO S I FOR ATIO