STR91XFA datasheet(37/78 Pages) STMICROELECTRONICS

37 / 78 page

STR91xFA

Pin description

37/78

4.1

LFBGA144 ball connections

●

In Table 4. balls labelled NC are no connect balls. These NC balls are reserved for future

devices and should NOT be connected to ground or any other signal. There are total of 9

NC (no connection) balls.

●

Balls H1 and G4 are assigned as EMI bus write signals (EMI_BWR_WRLn and

EMI_WRHn). These two balls can also be configured by the user as EMI low or high byte

select signals (EMI_LBn and EMI_UBn).

●

The PLLGND (B8) and PLLVDDQ (C9) balls can be connected to VSSQ and VDDQ.

Table 4.

STR91x LFBGA144 Ball Connections

1) NU (Not Used) on STR910FAW devices. D10 is not connected, C11 must be pulled up by a 1.5 kOhm resistor to VDDQ.

2) No USBCLK function on STR910FAW devices.

3) No PHYCLK function on STR910FAW devices.

BCD

P4.2

P7.2

P7.0

VDDQ

P7.3

P7.4

EMI_WRH

(EMI_UBn)

VDDQ

PHYCLK_

P5.2(3)

P8.0

P2.2

AVREF

P4.1

P4.0

P7.1

P2.0

P6.2

P5.3

P8.2

P8.3

VSSQ

P8.6

AVDD

P4.3

AVSS

P2.1

VSS

P6.3

P8.1

P6.1

P2.3

P8.4

VBATT

P4.6

P4.5

P4.4

VSSQ

P5.0

VDD

EMI_BWR_

WRLn

(EMI_LBn)

P6.0

P8.5

VSSQ

P2.4

X2_RTC

P7.7

VDDQ

VSSQ

P4.7

P7.5

VSSQ

VSS

P2.5

P8.7

VDDQ

X1_RTC

JTMS

JTDO

JTDI

P1.7

P7.6

P5.1

P2.6

P9.4

P9.3

P9.2

VDD

P9.0

P1.5

P1.4

VDD

VSS

P1.6

P6.5

VDDQ

VSSQ

P3.0

USBCLK_

P2.7 (2)

P9.1

VSSQ

PLLVSSQ

P1.3

JRSTn

JTCK

VSSQ

P6.4

EMI_BAAn

P3.3

EMI_WAIT

P9.5

EMI_BCLK

RESET_

OUTn

P1.2

PLLVDDQ

VDDQ

P6.6

VDDQ

P5.6

EMI_RDn

P9.7

P3.4

P9.6

X1_CPU

P1.0

P1.1

USBDN(1)

TAMPER_

VSS

P0.4

EMI_ALE

P0.1

P3.5

P3.1

X2_CPU

JRTCK

USBDP(1)

MII_MDIO

(1)

P0.6

P0.5

VDD

P5.5

P0.2

P3.7

P0.0

P3.2

EMI_WEn

P0.7

RESET_INn

P6.7

P5.7

P0.3

P5.4

VDDQ

VSSQ

P3.6

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