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EXAMPLE BOARD LAYOUT

6X (0.75)

4X (1)

.000 PKG

0

0.05 MIN

ALL AROUND

0.05 MAX

ALL AROUND

6X (0.25)

(2.65)

4X (0.65)

2X (2)

2X (3.35)

4X (0.8)

4X (0.3)

4X (0.575)

4X (0.45)

(0.05) TYP

(R0.05) TYP

4X (1.4)

(0.3)

6X (

)

1.925

6X (

)

1.425

6X (

)

1.425

6X (

)

1.925

( 0.2) TYP

VIA

2X (

)

0.625

2X (

)

0.625

uSIP - 1.6 mm max height

SIE0014A-C01

MICRO SYSTEM IN PACKAGE

4228828/B 10/2022

1

5

10

SCALE:15X

LAND PATTERN EXAMPLE

6

11

12

13

14

METAL UNDER

SOLDER MASK

TYP

SOLDER MASK

OPENING

TYP

SEE DETAILS

NOTES: (continued)

TM

5. This package is designed to be soldered to thermal pads on the board. For more information, see Texas Instruments literature

number SLUA271 (www.ti.com/lit/slua271).

6. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown

on this view. It is recommended that vias under paste be filled, plugged or tented.

NON SOLDER MASK

DEFINED

SOLDER MASK DEFINED

PADS 1, 5, 6, 10 AND 11 - 14

METAL UNDER

SOLDER MASK

SOLDER MASK

OPENING

NOT TO SCALE

SOLDER MASK DETAILS

SOLDER MASK

OPENING

METAL

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TPSM82816

SLUSEY7A – DECEMBER 2022 – REVISED JUNE 2024

Copyright © 2024 Texas Instruments Incorporated

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