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LAN8804/ZMXC1 bảng dữ liệu(PDF) 26 Page - Microchip Technology |
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LAN8804/ZMXC1 bảng dữ liệu(HTML) 26 Page - Microchip Technology |
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26 / 91 page ![]() LAN8804 DS00003591G-page 26 © 2024 Microchip Technology Inc. and its subsidiaries 4.0 DEVICE CONNECTIONS The following example device connection information and diagrams are included in this section: • Voltage Regulator and Power Connections • QSGMII MAC Interface • Ethernet Media Interface 4.1 Voltage Regulator and Power Connections The LAN8804 integrates an optional LDO controller for use with an external P-channel MOSFET to generate the 1.1V supply from an existing 2.5V or 3.3V source. Use of the LDO controller and MOSFET is not required. An external 1.1V supply can be alternatively utilized. 4.1.1 MOSFET SELECTION The selected MOSFET should exceed the following minimum requirements: • P-channel • 500 mA (continuous current) • 3.3V or 2.5V (source – input voltage) • 1.1V (drain – output voltage) The VGS for the MOSFET must be operating in the constant current saturated region and not towards the threshold voltage for the cut-off region of the MOSFET, VGS(th). A 220 µF electrolytic capacitor between 1.1V and ground is required for proper LDO operation. 4.1.2 LDO DISABLE The LDO controller is enabled by default. It may alternatively be disabled via internal register settings. An external source of 1.1V is necessary if the LDO is disabled. 4.1.3 POWER CONNECTIONS Figure 4-1 illustrates the device power connections. |
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