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XRT86VL32IB bảng dữ liệu(PDF) 49 Page - Exar Corporation |
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XRT86VL32IB bảng dữ liệu(HTML) 49 Page - Exar Corporation |
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49 / 65 page ![]() XRT86VL32 46 REV. V1.2.0 DUAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION AC ELECTRICAL CHARACTERISTICS TRANSMIT FRAMER (HMVIP/H100 MODE) FIGURE 5. FRAMER SYSTEM TRANSMIT TIMING DIAGRAM (HMVIP AND H100 MODE) NOTE: Setup and Hold time is not valid from TxInClk to TxSERCLK as TxInClk is used as the timing source for the back plane interface and TxSERCLK is used as the timing source on the line side. Test Conditions: TA = 25°C, VDD = 3.3V + 5% unless otherwise specified SYMBOL PARAMETER MIN. TYP. MAX. UNITS CONDITIONS t1 TxSYNC Setup Time - HMVIP Mode 7 nS t2 TxSYNC Hold Time - HMVIP Mode 4 nS t3 TxSYNC Setup Time - H100 Mode 7 nS t4 TxSYNC Hold Time - H100 Mode 4 nS t5 TxSER Setup Time - HMVIP and H100 Mode 6 nS t6 TxSER Hold Time - HMVIP and H100 Mode 3 nS t7 TxSIG Setup Time - HMVIP and H100 Mode 6 nS t8 TxSIG Hold Time - HMVIP and H100 Mode 3 nS TxSYNC (H100 Mode) TxCHN_0 (TxSIG) t 4 A B CD t 3 TxSERCLK TxSER t 5 t 6 t 7 t 8 TxSYNC (HMVIP Mode) t 2 t 1 TxInClk (16MHz) |
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