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33989 bảng dữ liệu(PDF) 45 Page - Freescale Semiconductor, Inc

tên linh kiện 33989
Giải thích chi tiết về linh kiện  System Basis Chip with High-Speed CAN Transceiver
PDF  66 Pages
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
Trang chủ  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

33989 bảng dữ liệu(HTML) 45 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
Freescale Semiconductor
45
33989
TYPICAL APPLICATIONS
SUPPLEMENTAL APPLICATION NOTES
Figure 32. Overcurrent Wake-Up
•T1:VDD1 output current deglitcher time:IDD1-DGLT: typ
55 µs
• T2: Over current detected to SBC wake-up (INT pulse)
= typ 60 µs
• The total time is 148 µs in this case.
LX with Cyclic Sense
Figure 33.
• T1: Is dependent on the selected cyclic sense timing in
the TIM2 register (5 ms to 400 ms). LX is sampled 10 µs
before the end of cyclic sense on time. If the LX correct
wake-up level happens just after sample point, the
wake-up will be detected at the next HS1 activation and
a complete period is lost.
• T2: It is the same than Lx to INT pulse: typ 100 µs
• The total time is around 5.13 ms (for a cyclic sense total
time of 5 ms) in the above example.
MC33989 CAN INTERFACE
This section is a detailed description of the CAN interface
of the MC33989.
Block Diagram
Figure 34 is a simplified block diagram of the CAN
interface of the MC33989.
INT
IDD1 current
(17 mA typ)
t1
t2
SBC ready to accept SPI command.
Wake-up signalled to MCU.
IDD1S-WU
tINT + tS-1STSPI (33µs max)
LX
HS1
INT
t2
t1
SBC ready to accept SPI command.
Wake-up signalled to MCU.
tINT + tS-1STSPI (33µs max)



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