33793 datasheet(22/27 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33793

TYPICAL APPLICATIONS

COMMUNICATION FORMAT

DSI messages are composed of individual words

separated by a frame delay. Transfers are full duplex.

Command messages from the master occur at the same time

as responses from the slaves. Slave responses to commands

occur during the next command message. This allows slaves

time to decode the command, retrieve the information and

prepare to send it to the master. A bus traffic example is

shown in Figure 6.

The example shows three commands separated by the

minimum frame delay followed by a command after a longer

delay.

Figure 6. Bus Traffic Example

IO0

H_CAP

BUSOUT

BUSRTN

LOGOUT

REGOUT

IO1

IO2

IO3

BUSIN

Rectifiers

Bus Switch

0 – 35 V Bi-Directional

Forward Receiver

Reverse Receiver

Data

Frame

Received

Message

from MCU

Bandgap

Reference

Data

Frame

Bandgap

Reference

1.0

µF

Typical

Response

Current

0 –11 mA

7.0 mA/

µS

Oscillator

4.0 MHz

Logic

Command Decode

State Machine

Response Generation

I/O Buffers

DataOut <3:0>

DataOut <0>

DataOut <1>

DataOut <2>

DataOut <3>

I/O<3:0>

I/O0

I/O1

I/O2

I/O3

SEL

Logic Out

High Current

Buffer

Address A<3:0>

4 Bits NVM

Power

Management

5.0 V Regulator

BG Reference

Bias Currents

4:1

MUX

ADC

8 Bits

Supply Comparators

POR

Undervoltage

Detector

GND

4.7

µF

Bus Return

Master

Slave

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