PHT6N03LT datasheet(4/6 Pages) PHILIPS

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Philips Semiconductors

Product specification

TrenchMOS

™ transistor

PHT6N03LT

Logic level FET

Fig.5. Typical output characteristics, T

j = 25 ˚C.

D = f(VDS); parameter VGS

Fig.6. Typical on-state resistance, T

j = 25 ˚C.

DS(ON) = f(ID); parameter VGS

Fig.7. Typical transfer characteristics.

D = f(VGS) ; conditions: VDS = 25 V; parameter Tj

Fig.8. Typical transconductance, T

j = 25 ˚C.

fs = f(ID); conditions: VDS = 25 V

Fig.9. Normalised drain-source on-state resistance.

a = R

DS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 3.2 A; VGS = 5 V

Fig.10. Gate threshold voltage.

GS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS

02468

BUK9830-30

VDS / V

ID / A

2.5

3.5

4.5

VGS / V =

1020

3040

5060

9830-30

ID / A

gfs / S

Tj / C = 25

150

102030405060

9830-30

ID / A

RDS(ON) / mOhm

VGS / V =

4.5

3.5

-50

100

150

0.5

1.5

SOT223 30V Trench

Tj / C

Normalised RDS(ON) = f(Tj)

0123

456

9830-30

VGS / V

ID / A

Tj / C = 25

150

BUK959-60

-100

-50

100

150

200

0.5

1.5

2.5

Tj / C

VGS(TO) / V

max.

typ.

min.

January 1998

Rev 1.300

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