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DSP56362P bảng dữ liệu(PDF) 72 Page - Freescale Semiconductor, Inc |
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DSP56362P bảng dữ liệu(HTML) 72 Page - Freescale Semiconductor, Inc |
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72 / 152 page ![]() Parallel Host Interface (HDI08) Timing DSP56362 Technical Data, Rev. 4 3-46 Freescale Semiconductor 3.11 Parallel Host Interface (HDI08) Timing Table 3-20 Host Interface (HDI08) Timing1, 2 No. Characteristics3 Expression 100 MHz Unit Min Max 317 Read data strobe assertion width4 HACK read assertion width TC + 9.9 19.9 — ns 318 Read data strobe deassertion width4 HACK read deassertion width —9.9 — ns 319 Read data strobe deassertion width4 after “Last Data Register” reads5 , 6, or between two consecutive CVR, ICR, or ISR reads7 HACK deassertion width after “Last Data Register” reads5, 6 2.5 × T C + 6.6 31.6 — ns 320 Write data strobe assertion width8HACK write assertion width — 13.2 — ns 321 Write data strobe deassertion width8 HACK write deassertion width after ICR, CVR and “Last Data Register” writes5 2.5 × T C + 6.6 31.6 — ns after IVR writes, or after TXH:TXM writes (with HBE=0), or after TXL:TXM writes (with HBE=1) 16.5 — 322 HAS assertion width — 9.9 — ns 323 HAS deassertion to data strobe assertion9 —0.0 — ns 324 Host data input setup time before write data strobe deassertion8 Host data input setup time before HACK write deassertion —9.9 — ns 325 Host data input hold time after write data strobe deassertion8 Host data input hold time after HACK write deassertion —3.3 — ns 326 Read data strobe assertion to output data active from high impedance4 HACK read assertion to output data active from high impedance —3.3 — ns 327 Read data strobe assertion to output data valid4 HACK read assertion to output data valid —— 24.2 ns 328 Read data strobe deassertion to output data high impedance4 HACK read deassertion to output data high impedance —— 9.9 ns 329 Output data hold time after read data strobe deassertion4 Output data hold time after HACK read deassertion —3.3 — ns 330 HCS assertion to read data strobe deassertion4 TC +9.9 19.9 — ns 331 HCS assertion to write data strobe deassertion8 —9.9 — ns 332 HCS assertion to output data valid — — 19.1 ns |
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