MPC8313ECVRAFF datasheet(19/88 Pages) FREESCALE

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MPC8313E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 0

Freescale Semiconductor

DDR and DDR2 SDRAM

6.2.2

DDR and DDR2 SDRAM Output AC Timing Specifications

Table 19. DDR and DDR2 SDRAM Output AC Timing Specifications

At recommended operating conditions.

Parameter

Symbol 1

Min

Max

Unit

Notes

MCK[n] cycle time, MCK[n]/MCK[n] crossing

tMCK

610

ADDR/CMD output setup with respect to MCK

tDDKHAS

333 MHz

2.1

—

266 MHz

2.5

—

200 MHz

3.5

—

ADDR/CMD output hold with respect to MCK

tDDKHAX

333 MHz

2.40

—

266 MHz

3.15

—

200 MHz

4.20

—

MCS[n] output setup with respect to MCK

tDDKHCS

333 MHz

2.40

—

266 MHz

3.15

—

200 MHz

4.20

—

MCS[n] output hold with respect to MCK

tDDKHCX

333 MHz

2.40

—

266 MHz

3.15

—

200 MHz

4.20

—

MCK to MDQS Skew

tDDKHMH

–0.6

0.6

MDQ//MDM output setup with respect to MDQS

tDDKHDS,

tDDKLDS

333 MHz

800

—

266 MHz

900

—

200 MHz

1000

—

MDQ//MDM output hold with respect to MDQS

tDDKHDX,

tDDKLDX

333 MHz

900

—

266 MHz

1100

—

200 MHz

1200

—

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