MPC8313ECVRAFF datasheet(55/88 Pages) FREESCALE

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MPC8313E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 0

Freescale Semiconductor

SPI

Figure 35 provides the AC test load for the SPI.

Figure 35. SPI AC Test Load

Figure 36 through Figure 37 represent the AC timing from Table 54. Note that although the specifications

generally reference the rising edge of the clock, these AC timing diagrams also apply when the falling edge

is the active edge.

Figure 36 shows the SPI timing in Slave mode (external clock).

Figure 36. SPI AC Timing in Slave Mode (External Clock) Diagram

Figure 37 shows the SPI timing in Master mode (internal clock).

Figure 37. SPI AC Timing in Master Mode (Internal Clock) Diagram

Output

Z0 = 50 Ω

OVDD/2

RL = 50 Ω

SPICLK (input)

tNEIXKH

tNEIVKH

tNEKHOV

Input Signals:

SPIMOSI

(See Note)

Output Signals:

SPIMISO

(See Note)

Note: The clock edge is selectable on SPI.

SPICLK (output)

tNIIXKH

tNIKHOV

Input Signals:

SPIMISO

(See Note)

Output Signals:

SPIMOSI

(See Note)

Note: The clock edge is selectable on SPI.

tNIIVKH

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