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MPC8313CVRAFF bảng dữ liệu(PDF) 9 Page - Freescale Semiconductor, Inc |
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MPC8313CVRAFF bảng dữ liệu(HTML) 9 Page - Freescale Semiconductor, Inc |
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9 / 88 page ![]() MPC8313E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 0 Freescale Semiconductor 9 Electrical Characteristics Figure 2 shows the undershoot and overshoot voltages at the interfaces of the MPC8313E. Figure 2. Overshoot/Undershoot Voltage for GVDD/NVDD/LVDD Analog power for e300 core APLL AVDD1 1.0 V 10 mA Analog power for system APLL AVDD2 1.0 V 10 mA DDR and DDR2 DRAM I/O voltage GVDD 2.5/1.8 V 425 mA Differential reference voltage for DDR controller MVREF 1/2 DDR Supply V Standard I/O Voltage NVDD 3.3 V 27 mA eTSEC2 IO Supply LVDDA 2.5/3.3 V 85 mA eTSEC1/USB DR IO Supply LVDDB 2.5/3.3 V 85 mA Supply for eLBCIOs LVDD 3.3 V 60 mA Analog and Digital Ground VSS 0.0 V Notes: 1. GVDD, OVDD, AVDD, and VDD must track each other and must vary in the same direction–either in the positive or negative direction. Table 2. Recommended Operating Conditions (continued) Characteristic Symbol Recommended Value1 Unit Current requirement VSS VSS – 0.3 V VSS – 0.7 V Not to Exceed 10% G/L/NVDD + 20% G/L/NVDD G/L/NVDD + 5% of tinterface 1 1. Note that tinterface refers to the clock period associated with the bus clock interface. VIH VIL Note: |
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