TMD2621 datasheet(26/59 Pages) OSRAM

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Datasheet, Public

Page 25

[v4-00] 2023-Apr-12

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TMD2621 − Register Overview

EYE_SAFETY_STATUS Register (Address 0x9F)

Figure 37:

EYE_SAFETY_STATUS Register

Addr: 0x9F

EYE_SAFETY_STATUS

Bit

Bit Name

Default

Access

Bit Description

7:5

Reserved

Reserved. Must be set to default value.

EYE_SAFETY_WD_

STATUS_SYNCED

When the flag is set, it indicates that the watchdog

has triggered.

When DISABLE_PROX_ON_WD_FAIL is set, the

PLDRIVER0 is disabled when this flag is set.

3:2

Reserved

Reserved. Must be set to default value.

PLDRIVE0_PAD_

SHORT_VSS_FAIL

When the flag is set, it indicates that the VSS check

during eye safety check failed for PLDRIVER0. The

PLDRIVER0 is disabled (no pulses are sent) in case of

failure but the proximity timing is maintained.

When ESIEN is 1, an interrupt is generated in the

final state after PROX_DATA_AVG is complete.

The flag is cleared when PON is made 0. Writing a 1

to this field will clear the flag. To enable

clear-by-read function, INT_READ_CLEAR in the

PLDRIVER0_PAD_

SHORT_VDD_FAIL

When the flag is set, it indicates that the VDD check

during eye safety check failed for PLDRIVER0. The

PLDRIVER0 is disabled (no pulses are sent) in case of

failure but the proximity timing is maintained.

When ESIEN is 1, an interrupt is generated in the

final state after PROX_DATA_AVG is complete.

The flag is cleared when PON is made 0. Writing a 1

to this field will clear the flag. To enable

clear-by-read function, INT_READ_CLEAR in the

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