ACT88321 datasheet(41/55 Pages) QORVO

41 / 55 page

ACT88321

Advanced PMIC with 3 Bucks, 2 LDOs, and Load Bypass Switches

Datasheet Rev. D , June 17, 2022 | Subject to change without notice

41 of 55

www.qorvo.com

PC Board Layout Guidance

Proper parts placement and PCB layout are critical to

the operation of switching power supplies. Follow the

following

layout

guidelines

when

designing

the

ACT88321 PCB. Refer to the Qorvo ACT88321

Evaluation Kits for layout examples

Place the buck input capacitors as close as

possible to the IC. Connect the capacitors di-

rectly to the corresponding VIN_Bx input pin

and PGNDx power ground pin on the same

PCB layer as the IC. Avoid using vias.

Minimize the switch node trace length between

each SW_Bx pin and the inductor. Avoid routing

sensitive analog signals near these high fre-

quency, high dV/dt traces.

Place the LDO input capacitors close to their in-

put pins. Connect their ground pins into the

ground plane that connects the IC’s PGNDx

pins.

The input capacitor and output capacitor

grounds should be connected as close together

as possible, with short, direct, and wide traces.

Connect the PGNDx ground pins and the

AGND ground pin directly to the PGND under

the IC. The AGND ground plane should be

routed separately from the other ground planes

and only connect to the main ground plane un-

der the IC at the AGND pin.

Connect the VIN input capacitor to the AGND

ground pin.

Remember that all open drain outputs need

pullup resistors.

Connect the PGND directly to the top layer

ground plane. Connect the top layer ground

plane to both internal ground planes and the

PCB backside ground plane with thermal vias.

Provide ground plane routing on multiple layers

that allows the IC’s heat to flow into the PCB

and then spread radially from the IC. Avoid cut-

ting the ground planes and adding vias that re-

strict the radial flow of heat of operating condi-

tions and are relatively insensitive to layout con-

siderations.

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