UCD7230 datasheet(8/33 Pages) TI

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UCD7230

SLUS741C – NOVEMBER 2006 – REVISED MARCH 2007

ELECTRICAL CHARACTERISTICS (continued)

DD = PVDD = 12 V, 4.7-µF from VDD to AGND, 1 µF from PVDD to PGND, 0.1 µF from CSBIAS to AGND, 0.22 µF from BST to

SW, T

A = TJ = -40°C to +125°C, RCS+ = 5 kΩ, RDLY = 50 kΩ over operating free-air temperature range (unless otherwise

noted).

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

LOW-SIDE OUTPUT DRIVER (OUT2)

Source current(3)

VDD = 12 V, IN = high, OUT2 = 5 V

2.2

Sink current (3)

VDD = 12 V, IN = low, OUT2 = 5 V

3.5

Source current(3)

VDD = 4.75 V, IN = high, OUT2 = 0

1.6

VDD = 4.75 V, IN = low, OUT2 =

Sink current (3)

4.75 V

Rise time(3)

CLOAD = 2.2 nF, VDD = 12 V

Fall time(3)

CLOAD = 2.2 nF, VDD = 12 V

Output with VDD <UVLO

VDD = 1.0 V, Isink = 10 mA

0.8

1.2

Propagation delay from IN to

CLOAD = 2.2 nF, IN rising, SW = 2.5

OUT2(3)

V, BST = PVDD = VDD = 12 V

HIGH-SIDE OUTPUT DRIVER (OUT1)

VDD = 12 V, BST = 12 V IN = High,

Source current(3)

1.7

OUT1 = 5 V

VDD = 12 V, BST = 12 V IN = Low,

Sink current (3)

3.5

OUT1 = 5 V

VDD = 4.75 V = BST = 4.75 V, IN =

Source current (3)

High, OUT1 = 0

VDD = 4.75 V, BST = 4.75 V, IN =

Sink current (3)

2.4

Low, OUT1 = 4.75 V

CLOAD = 2.2 nF OUT1 to SW, VDD

Rise time(3)

= 12 V

CLOAD = 2.2 nF OUT1 to SW, VDD =

Fall time (3)

12 V

Propagation delay from IN to

CLOAD = 2.2 nF, IN falling, SW = 2.5

OUT1(3)

V, BST = PVDD = VDD = 12 V

(3)

As designed and characterized. Not 100% tested in production.

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