TPS40077PWPR datasheet(21/43 Pages) TI

21 / 43 page

www.ti.com

INTERNAL REGULATORS

TPS40077 POWER DISSIPATION

T +

) IQ

(Watts)

(14)

T + 2

SW ) IQ

(Watts)

(15)

T +

J * TA

(Watts)

(16)

SW +

J*TA

* IQ

(Hz)

(17)

TPS40077

SLUS714 – JANUARY 2007

APPLICATION INFORMATION (continued)

The internal regulators are linear regulators that provide controlled voltages from which the drivers and the

internal circuitry operate. The DBP pin is connected to a nominal 8-V regulator that provides power for the driver

circuits. This regulator has two modes of operation. At VDD voltages below 8.5 V, the regulator is in a

low-dropout mode of operation and tries to provide as little impedance as possible from VDD to DBP. Above 10

V at VDD, the regulator regulates DBP to 8 V. Between these two voltages, the regulator remains in the state it

was in when VDD entered this region (see Figure 20). Small amounts of current can be drawn from this pin for

other circuit functions, as long as power dissipation in the controller device remains at acceptable levels and

junction temperature does not exceed 125

°C.

The LVBP pin is connected to another internal regulator that provides 4.2 V (nom) for the operation of

low-voltage circuitry in the controller. This pin can be used for other circuit purposes, but extreme care must be

taken to ensure that no extra noise is coupled onto this pin; otherwise, controller performance suffers. Current

draw is not to exceed 1 mA. See Figure 21 for typical output voltage at this pin.

The power dissipation in the TPS40077 is largely dependent on the MOSFET driver currents and the input

voltage. The driver current is proportional to the total gate charge, Qg, of the external MOSFETs. Driver power

(neglecting external gate resistance) can be calculated from:

PD = Qg × VDR × fSW

(Watts/driver)

where VDR is the driver output voltage

The total power dissipation in the TPS40077, assuming the same MOSFET is selected for both the high-side

and synchronous rectifier, is described in Equation 14 or Equation 15.

where IQ is the quiescent operating current (neglecting drivers)

The maximum power capability of the TPS40077 PowerPAD package is dependent on the layout as well as air

flow. The thermal impedance from junction to air, assuming 2-oz. copper trace and thermal pad with solder and

no air flow, is 37

°C/W. See the application report titled PowerPAD Thermally Enhanced Package (SLMA002) for

detailed information on PowerPAD package mounting and usage.

The maximum allowable package power dissipation is related to ambient temperature by Equation 16. For

JA,

see the Package Dissipation Ratings table.

Substituting Equation 16 into Equation 15 and solving for fSW yields the maximum operating frequency for the

TPS40077. The result is described in Equation 17.

Submit Documentation Feedback

TPS40077PWPR bảng dữ liệu(PDF) 21 Page - Texas Instruments

TPS40077PWPR bảng dữ liệu(HTML) 21 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43

bảng dữ liệu tải về

Link URL