L6701 datasheet(35/44 Pages) STMICROELECTRONICS

35 / 44 page

L6701

15 System Control Loop Compensation

35/44

System Control Loop Compensation

The control loop is composed by the Current Sharing control loop (See Figure 17) and the

Average Current Mode control loop. Each loop gives, with a proper gain, the correction to the

PWM in order to minimize the error in its regulation: the Current Sharing control loop equalize

the currents in the inductors while the Average Current Mode control loop fixes the output

voltage equal to the reference programmed by VID. Figure 17 shows the block diagram of the

system control loop.

The system Control Loop is reported in Figure 18. The current information IDROOP sourced by

the DROOP pin flows into RFB implementing the dependence of the output voltage from the

read current.

Figure 17. Main Control Loop

The system can be modeled with an equivalent single phase converter which only difference is

the equivalent inductor L/3 (where each phase has an L inductor).The Control Loop gain results

(obtained opening the loop after the COMP pin):

Where:

●

is the equivalent output resistance determined by the droop function

(

for fully differential current sense);

●

ZP(s) is the impedance resulting by the parallel of the output capacitor (and its ESR) and

the applied load RO;

●

ZF(s) is the compensation network impedance;

●

ZL(s) is the parallel of the three inductor impedance;

●

A(s) is the error amplifier gain;

PWM3

PWM2

PWM1

4 / 5

Reference

ERROR AMPLIFIER

COMP

ZF(s)

IDROOP

COUT

ROUT

1 / 5

CURRENT SHARING

DUTY CYCLE

CORRECTION

IINFO1

IINFO3

IINFO2

LOO P s

()

PWM Z

F s

() R

DROOP

P s

()

⋅⋅

P s

() Z

L s

()

[]

F s

()

---------------

()

------------

⎝⎠

⎛⎞ R

⋅

--------------------------------------------------------------------------------------------------------------------

–

D ROOP

DCR

------------- RFB

⋅

DR OO P

DCR

------------- RFB

⋅⋅

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