ADA4351-2ACPZ-R7 datasheet(28/36 Pages) AD

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Data Sheet

ADA4351-2

APPLICATIONS INFORMATION

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Rev. 0 | 28 of 36

TIA DESIGN THEORY

With its low input bias current and 8.5 MHz gain bandwidth product,

the ADA4351-2 offers an effective solution for programmable gain

photodiode amplifier applications. Figure 86 shows a typical design

setup using one of the two possible feedback channels available.

The example in Figure 86 shows the external RC values for the 15

kΩ, 100 pF photodiode capacitance (CD), 16 pF external feedback,

CF,EXT, example shown in Figure 96.

Example Transimpedance Design with

Overcompensated Response

Figure 86. Example Transimpedance Design Giving the Overcompensated

Frequency Response Shown in Figure 96

For transimpedance design, a photodiode capacitance and any

layout parasitic and internal parasitic capacitance for the amplifier

must be taken into consideration. The shunt resistance (RSH) of

the photodiode is normally some orders of magnitude greater than

RF (RSH >> RF) and is usually neglected for the design. Determine

the CD at the reverse bias voltage (−VB) using the curve in the

user-selected diode data sheet. The total source capacitance (CS)

at the inverting input is as follows:

CS = CD + CCM + CDIFF + CSTRAY

where:

CCM is the internal, common-mode capacitance.

CDIFF is the internal, differential capacitance (with CCM +

CDIFF = 5.5 pF).

CSTRAY is the stray capacitance due to the PCB.

Calculate the total CF as follows:

CF = CF,EXT + CF,INT

where:

CF,EXT is the external feedback capacitance.

CF,INT is the internal, 3 pF feedback capacitance of the ADA4351-2.

The DC gain is set by the RF value. The overall frequency response

is determined by multiple frequency elements whose effects lay

over each other. To approximate the characteristic frequency (f0),

calculate the geometric mean of the noise gain zero formed by RF

and CS, given by Z1 in Figure 87, and the GPB of the amplifier.

While some designs can force the closed-loop response to single

pole (making the feedback pole, P1, much lower than the character-

istic frequency), most designs either try to drive the gain up as high

as possible for a target bandwidth or try to drive the bandwidth up

as high as possible for a target RF. Figure 87 shows these key

frequencies in a loop gain Bode plot of the single-pole, open-loop

response of the op amp and the inverse of the feedback divider

(1/β) superimposed on that. This 1/β is the noise gain frequency

response and also is the gain over frequency for the 7.3 nV/√Hz

input voltage noise.

Figure 87. Loop Gain Plot for Any Transimpedance Amplifier Design

Because CS is often much larger than CF, it is a good approxima-

tion to drop CF out of the equation for Z1 (see Figure 87). In that

circumstance, the equations for P1 and f0 are now independent of

each other; therefore, P1 can be adjusted without affecting f0 signif-

icantly. Normally, P1 is less than f0 and produces a closed-loop

second-order response with either two real poles (Q ≤ 0.5) or com-

plex poles (Q > 0.5) giving a classic second-order response. The

example overcompensated design of Figure 86 shows these loop

gain magnitude elements in Figure 88. The AOL is the open-loop,

single-pole gain response, and the noise gain starts at 0 dB at DC

and then rises at ≈101 kHz (noise gain zero, Z1) and flattens back

out at P1 = 573 kHz with the higher noise gain set by 1 + CS/CF

= 1 + 105.4 pF/19 pF = 6.5 V/V (or 16.3 dB), crossing over the

AOL curve with excellent phase margin as seen in Figure 89. The

approximate

f0 = 8.5 MHz × 101 kHz = 926 kHz,where

the resulting closed-loop transimpedance response (see Figure 88)

shows the rolled off response for the Q ≈ 0.62 in this test circuit

giving f−3 dB ≈ 745 kHz. A good approximation when CS > 5 × CF is

that Q ≈ (P1/f0), where it solves to 573 kHz/926 kHz = 0.62 = Q.

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