ADA4351-2ACPZ-R7 datasheet(25/36 Pages) AD

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Data Sheet

ADA4351-2

THEORY OF OPERATION

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Rev. 0 | 25 of 36

Switch Off Leakage Current

In a PGTIA, the IOFF of the switches also adds to the total error

current in the system. The IOFF increases exponentially with tem-

perature. For a CMOS switch, there is a trade-off between on

resistance (RON) and IOFF. For systems that require the use of

low RF values, minimize the gain error by using a low RON switch.

However, a system with a large RF value is much more sensitive to

IOFF and requires a switch with a lower IOFF, and therefore, higher

RON. Another important aspect of CMOS switches is the IOFF when

operating the switch near the supply rail. Typical CMOS switches

exhibit excessive leakage when operating within 0.5 V from the

supply rail and, therefore, the leakage is not typically specified in

this region. Not only does the ADA4351-2 have low IOFF switches

(considering their low RON), but also the low leakage performance

extends to 0.1 V from the rail, yielding a wider usable range for the

TIA circuit.

Improved TIA Gain Accuracy Using a Kelvin

Connection for Channel Select

A typical switched gain TIA places the switches in series with

the different feedback resistors (see Figure 82), and therefore, the

switch on resistance is part of the transimpedance gain function.

The improved Kelvin approach used in the ADA4351-2 (see Figure

83) places half of the switches inside the loop to provide a Kelvin

connection. The on resistance of the left side switch shown in

Figure 83 then becomes part of the open-loop output impedance

and is corrected by the loop gain of the amplifier. Using the typical

open-loop gain (AOL) of 158 dB and the DC noise gain of 1 in a

TIA, the maximum on resistance of 19 Ω gives a vastly lower error

term of 19 Ω/(1 + 10158/20) = 0.24 µΩ to the output. Assuming no

load current, the on resistance of the right side switch does not

contribute any IR drop, so the voltage at the output is ID × RF. The

SW0 and SW1 pins have internal series resistances of 0.2 Ω and

0.56 Ω, respectively. To minimize parasitic resistance error, connect

the lower of the external RF values to the pin with the lower internal

resistance, SW0.

Figure 82. Switched Gain Transimpedance Amplifier with Error due to RON

Figure 83. Switched Gain Transimpedance Amplifier with Kelvin Switching

With the switch traditionally in series with RF, the RON of the switch

can vary over temperature and over signal level, which can also

result in gain error drift and nonlinearity.

The two trade-offs of Kelvin sensing are loss of headroom due to

ID × RON and an IOFF contribution because there is an off switch in

parallel feeding back through the inactive feedback resistor into the

summing junction. The loss of headroom is minimized by the low

RON of the switches in the ADA4351-2 (11 Ω at 5 V). Additionally,

the total IOFF of the parallel switches in the ADA4351-2 still has a

much lower IOFF than typical discrete CMOS switches.

Linear Output Voltage Range Considerations

Most photodiode amplifier applications are single supply. While

the ADA4351-2 input pins can swing to the negative supply, the

output stage starts to lose linearity within 0.1 V of either supply

rail. For feedback resistors RF more than 10 kΩ, and for best

linearity, design for a maximum output swing of 0.1 V less than

the positive supply (AVDD). For smaller TIA gains down to 200 Ω,

additional positive output headroom is required to accommodate for

an additional IR drop through the channel select switches inside the

amplifier loop. A conservative estimate of the maximum available

linear output voltage swing including this effect is given by the

following equation:

VO,MAX=AVDD−VHR

1+RONRF

(1)

where:

VHR is the no load headroom.

RON is the resistance of the switch inside the loop.

For example, assume VHR = 0.1 V, and RON = 33 Ω at 3 V and

19 Ω at 5 V over temperature (−40°C to +125°C). The resulting

output headroom vs. RF curves for 3 V and 5 V are shown in Figure

84). Carefully consider these effects to maintain the best signal path

linearity with the lowest DC errors.

The previous example assumed no load, and thus, no IR drop

across the switch on the right side in Figure 83. If there is a load,

there is also an IR drop through the right side switch outside the

loop in series with the output.

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