1

®

November 2004

80C88

CMOS 8/16-Bit Microprocessor

Features

• Compatible with NMOS 8088

• Direct Software Compatibility with 80C86, 8086, 8088

• 8-Bit Data Bus Interface; 16-Bit Internal Architecture

• Completely Static CMOS Design

- DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5MHz (80C88)

- DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8MHz (80C88-2)

• Low Power Operation

- ICCSB . . . . . . . . . . . . . . . . . . . . . . . . 500

µA Maximum

- ICCOP . . . . . . . . . . . . . . . . . . . . 10mA/MHz Maximum

• 1 Megabyte of Direct Memory Addressing Capability

• 24 Operand Addressing Modes

• Bit, Byte, Word, and Block Move Operations

• 8-Bit and 16-Bit Signed/Unsigned Arithmetic

• Bus-Hold Circuitry Eliminates Pull-up Resistors

• Wide Operating Temperature Ranges

Description

The Intersil 80C88 high performance 8/16-bit CMOS CPU is

manufactured using a self-aligned silicon gate CMOS pro-

cess (Scaled SAJI IV). Two modes of operation, MINimum

for small systems and MAXimum for larger applications such

as multiprocessing, allow user configuration to achieve the

highest performance level.

Full TTL compatibility (with the exception of CLOCK) and

industry-standard operation allow use of existing NMOS

8088 hardware and Intersil CMOS peripherals.

Complete software compatibility with the 80C86, 8086, and

8088 microprocessors allows use of existing software in new

designs.

Ordering Information

PACKAGE

TEMPERATURE RANGE

5MHz

8MHz

PKG. DWG. #

PDIP

CP80C88

CP80C88-2

E40.6

IP80C88

IP80C88-2

E40.6

CERDIP

MD80C88/B

F40.6

FN2949.3

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

Copyright Harris Corporation 1997, Copyright Intersil Americas Inc. 2004. All Rights Reserved