ADC34RF52 datasheet(23/105 Pages) TI

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6.3 Feature Description

6.3.1 Analog Inputs

The ADC34RF55 provides up to two internal ADCs per channel for purpose of averaging to improve the noise

performance. Two ADCs internally are connected to the same differential input pins as shown in the equivalent

input schematic (see Figure 6-1). The analog inputs have a differential 100 Ω split termination with internal

biasing. When only a single ADC is used, there is a minor parasitic capacitance remaining from the unused

ADC.

0.2 pF

GND

1 nH

xINP/

xINM

0.4 pF

GND

Sampling Switch

0.6 nH

1.4 pF

GND

0.7 pF

GND

0.4 pF

GND

1.4 pF

GND

0.7 pF

GND

ADCx

ADCy

VCM

GND

AVDD12

Figure 6-1. Equivalent input schematic

6.3.1.1 Input Bandwidth and Full-Scale

The input bandwidth (-3 dB) and input fullscale are dependent on what input termination and averaging mode

are chosen as shown in the summary in Table 6-1. The bandwidth can be increased by changing the input

termination to 50 Ω differential.

Table 6-1. Digital averaging vs Full Power Input Bandwidth (–3 dB)

No. of ADCs

averaged

ADC inputs used for

averaging

Input Bandwidth (-3 dB)

Selected differential input

termination

Input Full-scale

Default

INx1

2.75 GHz

100 Ω

+ 2 dBm

INx1

2.75 GHz

100 Ω

+ 3.5 dBm

The full power input bandwidth plots with input RESET switch disabled (RSW0) and enabled (RSW1) are shown

in Figure 6-2.

Input Frequency (MHz)

100

1000

4000

-10

-9

-8

-7

-6

-5

-4

-3

-2

-1

RSW1, 1x AVG

RSW1, 2x AVG

RSW0, 1x AVG

RSW0, 2x AVG

Figure 6-2. Input Bandwidth - Reset switch DIS

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ADC34RF55

SBAS988 – NOVEMBER 2023

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