M29DW128F datasheet(38/94 Pages) STMICROELECTRONICS

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Command interface

M29DW128F

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6.2.7

Quadruple byte Program command

This is used to write four adjacent bytes in x8 mode, simultaneously. The addresses of the

four bytes must differ only in A0, DQ15A-1.

Five bus write cycles are necessary to issue the command.

The first bus cycle sets up the command.

The second bus cycle latches the Address and the Data of the first byte to be written.

The third bus cycle latches the Address and the Data of the second byte to be written.

The fourth bus cycle latches the Address and the Data of the third byte to be written.

The fifth bus cycle latches the Address and the Data of the fourth byte to be written and

starts the Program/Erase Controller.

6.2.8

Octuple byte Program command

This is used to write eight adjacent bytes, in x8 mode, simultaneously. The addresses of the

eight bytes must differ only in A1, A0 and DQ15A-1.

Nine bus write cycles are necessary to issue the command:

The first bus cycle sets up the command.

The second bus cycle latches the Address and the Data of the first byte to be written.

The third bus cycle latches the Address and the Data of the second byte to be written.

The fourth bus cycle latches the Address and the Data of the third byte to be written.

The fifth bus cycle latches the Address and the Data of the fourth byte to be written.

The sixth bus cycle latches the Address and the Data of the fifth byte to be written.

The seventh bus cycle latches the Address and the Data of the sixth byte to be written.

The eighth bus cycle latches the Address and the Data of the seventh byte to be

written.

The ninth bus cycle latches the Address and the Data of the eighth byte to be written

and starts the Program/Erase Controller.

6.2.9

Unlock Bypass command

The Unlock Bypass command is used in conjunction with the Unlock Bypass Program

command to program the memory faster than with the standard program commands. When

the cycle time to the device is long, considerable time saving can be made by using these

commands. Three Bus Write operations are required to issue the Unlock Bypass command.

Once the Unlock Bypass command has been issued the bank enters Unlock Bypass mode.

When in Unlock Bypass mode, only the Unlock Bypass Program and Unlock Bypass Reset

commands are valid. The Unlock Bypass Program command can then be issued to program

addresses within the bank, or the Unlock Bypass Reset command can be issued to return

the bank to Read mode. In Unlock Bypass mode the memory can be read as if in Read

mode.

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