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CC2500-RTR1 bảng dữ liệu(PDF) 19 Page - Texas Instruments

tên linh kiện CC2500-RTR1
Giải thích chi tiết về linh kiện  Single Chip Low Cost Low Power RF Transceiver
PDF  84 Pages
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nhà sản xuất  TI [Texas Instruments]
Trang chủ  http://www.ti.com
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CC2500-RTR1 bảng dữ liệu(HTML) 19 Page - Texas Instruments

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CC2500
PRELIMINARY Data Sheet (Rev.1.2)
SWRS040A
Page 19 of 83
Figure 6: SmartRF
® Studio user interface
10 4-wire Serial Configuration and Data Interface
CC2500 is configured via a simple 4-wire SPI-
compatible interface (SI, SO, SCLK and CSn)
where
CC2500 is the slave. This interface is
also used to read and write buffered data. All
address and data transfer on the SPI interface
is done most significant bit first.
All transactions on the SPI interface start with
a header byte containing a read/write bit, a
burst access bit and a 6-bit address.
During address and data transfer, the CSn pin
(Chip Select, active low) must be kept low. If
CSn
goes high during the access, the transfer
will be cancelled. The timing for the address
and data transfer on the SPI interface is
shown in Figure 7 with reference to Table 16.
When CSn goes low, the MCU must wait until
CC2500 SO pin goes low before starting to
transfer the header byte. This indicates that
the voltage regulator has stabilized and the
crystal is running. Unless the chip is in the
SLEEP or XOFF states or an SRES command
strobe is issued, the SO pin will always go low
immediately after taking CSn low.
Figure 8 gives a brief overview of different
register access types possible.



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