tPHZ

tPLZ

tPZL

tPZH

3 V

0 V

Output

Control

(low-level

enabling)

Waveform 1

(see Notes C

and D)

Waveform 2

(see Notes C

and D)

≈1.5 V

VOH − 0.5 V

VOL + 0.5 V

≈1.5 V

1.5 V

1.5 V

1.5 V

1.5 V

VOH

VOL

10

SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244

SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244

SDLS144D – APRIL 1985 – REVISED OCTOBER 2016

www.ti.com

Product Folder Links: SN54LS240 SN54LS241 SN54LS244 SN54S240 SN54S241 SN54S244 SN74LS240

SN74LS241 SN74LS244 SN74S240 SN74S241 SN74S244

Submit Documentation Feedback

Copyright © 1985–2016, Texas Instruments Incorporated

A.

CL includes probe and jig capacitance.

B.

All diodes are 1N3064 or equivalent.

C.

Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output

control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the

output control.

D.

S1 and S2 are closed for tPLH, tPHL, tPHZ, and tPLZ; S1 is open and S2 is closed for tPZH; S1 is closed and S2 is open

for tPZL.

E.

All input pulses are supplied by generators having the following characteristics: PRR

≤ 1 MHz, ZO is approximately

50 Ω; tr and tf ≤ 7 ns for SN54LS24x and SN74LS24x devices, and tr and tf ≤ 2.5 ns for SN54S24x and SN74S24x

devices.

F.

The outputs are measured one at a time with one input transition per measurement.

Figure 15. Voltage Waveforms,

Enable and Disable Times, 3-State Outputs