NB650/NB650H

– 6A, 28V, FAST-TRANSIENT, SYNCHRONOUS STEP-DOWN CONVERTERS

NB650/NB650H Rev. 1.13

www.MonolithicPower.com

12

10/7/2019

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

Preliminary Specifications Subject to Change

© 2019 MPS. All Rights Reserved.

Where RO is the equivalent load resistor.

As described in Figure 6, VSLOPE2 in skip mode is

smaller than VSLOPE1 in PWM mode, so the jitter in

the skip mode is larger. For less jitter during

ultra-light

–load conditions, select smaller VFB

resistors,

though

at

the

cost

of

light-load

efficiency.

VID Input

Typically, R1 and R2 set the output voltage with

VFB=0.6V. R2, in this case, is a combination of

R2A, R2B, and R2C depends on the VID, which

is

active

low.

The

NB650/NB650H

can

dynamically track VID codes as they change. As

a result, the converter output voltage can change

without the need to reset either the controller or

the value of R1 and R2A. As shown in Figure 1,

R2B and R2C are parallel with R2A. The

equivalent value of R2 can change due to

different VID codes. One can get four VOUT

values depending on the VID codes with the

details in the application information. The VID

logic and equivalent R2s are shown in Table 1.

Table 1: VID Logic

2

VID

1

VID

R2

1

1

2

2A

RR



1

0

2

2A

2B

R

R

// R



0

1

2

2A

2C

R

R

// R



0

0

2

2A

2B

2C

R

R

// R

// R



Enable Control

The NB650/NB650H has a dedicated Enable

control pin (EN). Pulling this pin high or low

enables or disables the IC. Tie EN to VIN through

a resistor for automatic start-up.

Soft Start/Stop

The NB650/NB650H employs a soft-start/stop

(SS) mechanism to ensure smooth output during

power-up and power shutdown. When the EN pin

goes high, an internal current source (10

μA)

charges up the SS capacitor. The SS capacitor

voltage then acts as the VREF voltage to the PWM

comparator. The output voltage smoothly ramps

up with the SS voltage. Once the SS voltage

reaches the same level as the REF voltage, it

continues ramping up while the REF voltage

becomes the reference to the PWM comparator.

At this point, the soft-start finishes and it enters

steady-state operation.

When the EN pin goes low, a 10µA internal

current source discharges the SS capacitor.

Once the SS voltage reaches the REF voltage,

acts as the reference to the PWM comparator.

The output voltage decreases smoothly with the

SS voltage until it reaches zero level. Determine

the SS capacitor as follows:

)

V

(

V

)

A

(

I

)

ms

(

t

)

nF

(

C

REF

SS

SS

SS







(12)

If the output capacitors have large capacitance

values, avoid setting a short SS time. Use a

minimum value of 4.7nF if the output capacitance

value exceeds 330µF.

Power Good

The

NB650/NB650H

has

power-good

(PG)

output. The PG pin is the open drain of a

MOSFET. Connect to VCC or another voltage

source through a resistor (e.g. 100k

Ω). The

MOSFET turns ON after the application of the

input voltage so that the PG pin is pulled to GND

before the SS is ready. After the FB voltage

reaches 90% of the reference voltage, the PG pin

is pulled high after a delay.

The PG delay is determined as follows:

9

4

)

ms

(

t

)

ms

(

t

SS

PG





(13)

When the FB voltage drops to 90% of the

reference voltage, the PG pin is pulled low.

Over-Current

Protection

and

Short-Circuit

Protection

The NB650/NB650H has cycle-by-cycle over-

current limit control. The inductor current is

monitored during the ON state. Once the inductor

current hits the current limit, the HS-FET turns

off. At the same time, the over-current protection

(OCP) timer starts. The OCP timer is set as

50

μs. If the current limit is hit for every cycle

within that 50

μs period, then OCP will trigger.

When the output is shorted to ground, the device

hits its current limit and the FB voltage is less

than 0.4V. The device treats this as a dead-short