M41T62 datasheet(16/40 Pages) STMICROELECTRONICS

tên linh kiện	M41T62

Giải thích chi tiết về linh kiện	Serial Access Real-Time Clock with Alarms

PDF	40 Pages

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Operation

M41T62/63/64/65

16/40

2.3

WRITE mode

In this mode the master transmitter transmits to the M41T6x slave receiver. Bus protocol is shown in

Figure 19 on page 16. Following the START condition and slave address, a logic '0' (R/W=0) is placed on

the bus and indicates to the addressed device that word address “An” will follow and is to be written to the

on-chip address pointer. The data word to be written to the memory is strobed in next and the internal

address pointer is incremented to the next address location on the reception of an acknowledge clock.

The M41T6x slave receiver will send an acknowledge clock to the master transmitter after it has received

the slave address see Figure 16 on page 15 and again after it has received the word address and each

data byte.

Figure 19.

WRITE mode sequence

AI00591

BUS ACTIVITY:

SDA LINE

BUS ACTIVITY:

MASTER

DATA n

DATA n+1

DATA n+X

WORD

ADDRESS (An)

SLAVE

ADDRESS

M41T62 bảng dữ liệu(PDF) 16 Page - STMicroelectronics