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RT5510WSC bảng dữ liệu(PDF) 17 Page - Richtek Technology Corporation

tên linh kiện RT5510WSC
Giải thích chi tiết về linh kiện  Audio Amplifier with IV Sense
PDF  52 Pages
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nhà sản xuất  RICHTEK [Richtek Technology Corporation]
Trang chủ  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT5510WSC bảng dữ liệu(HTML) 17 Page - Richtek Technology Corporation

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RT5510
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation
DS5510-00
October
2019
www.richtek.com
17
Mode Transition
The state machine of mode transition is shown in Figure 7. After power on, the control bit will always be reset to
PWDN mode.
PWDN
OP
FAULT
DVDD, VBAT valid = 1
PWDN = 0 (I
2
C)
SR valid = 1 & BCK valid = 1
PWDN = 1 (I
2
C)
OTP/OCP/OVP/UVP = 1
OTP/OCP/OVP/UVP = 0
(Check every 200ms)
PWDN = 1 (I
2
C)
SUSP
SR valid = 0 or BCK valid = 0
SR valid = 0 or BCK valid = 0
PWDN = 1 (I
2
C)
Figure 7. Mode Transition
Power ON/OFF Sequence
The power on sequence is shown in Figure 8. After power is valid, two groups of control signals should be set.
I2C : PWDN and AMPE should be programmed. These two bits can be programmed by single command since they
are at the same byte address.
I2S : BCK should be valid on the specified interface.
If the PWDN is set to 0 before the BCK is valid, it will go to SUSP mode automatically. The output of amplifier will be
valid after entering OP mode Signal ramp up will always be implemented when the mode transits from PWDN or
SUSP mode to OP mode.
DVDD, VBAT
PWDN (I
2
C)
BCK (I
2
S)
(SUSP)
Power on
DATA Output (I
2
S)
Operation
INITIAL (I
2
C)
6ms
Amp on (I
2
C)
1ms
Amp off
Amp off (I
2C)
(SUSP)
power off
Figure 8. Power ON/OFF Sequence



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