UPD703003A datasheet(36/45 Pages) RENESAS

36 / 45 page

µPD703003A, 703004A, 703025A, 703003A(A), 703025A(A)

Data Sheet U13188EJ6V1DS

A/D Converter Characteristics (TA = –40 to +85

°C, VDD = AVDD = 5 V ±10%, VSS = AVSS = 0 V)

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

Resolution

—

bit

Overall errorNote 1

—

4.5 V

≤ AVREF1 ≤ AVDD

±0.4

%FSR

—

3.5 V

≤ AVREF1 ≤ AVDD

±0.7

%FSR

Quantization error

—

±1/2

LSB

Conversion time

tCONV

4.5 V

≤ AVREF1 ≤ AVDD

tCYK

3.5 V

≤ AVREF1 ≤ AVDD

tCYK

Sampling time

tSAMP

4.5 V

≤ AVREF1 ≤ AVDD

tCYK

3.5 V

≤ AVREF1 ≤ AVDD

tCYK

Zero-scale errorNote 1

—

4.5 V

≤ AVREF1 ≤ AVDD

±1.5

±3.5

LSB

—

3.5 V

≤ AVREF1 ≤ AVDD

±1.5

±4.5

LSB

Full-scale errorNote 1

—

4.5 V

≤ AVREF1 ≤ AVDD

±1.5

±2.5

LSB

—

3.5 V

≤ AVREF1 ≤ AVDD

±1.5

±4.5

LSB

Non-linearity errorNote 1

—

4.5 V

≤ AVREF1 ≤ AVDD

±1.5

±2.5

LSB

—

3.5 V

≤ AVREF1 ≤ AVDD

±1.5

±4.5

LSB

Analog input

VIAN

–0.3

AVDD + 0.3

voltageNote 2

Reference voltage

AVREF1

3.5

AVDD

AVREF1 current

AIREF1

1.2

3.0

AVDD supply current

AIDD

2.3

6.0

Notes 1. Excludes quantization error.

2. When VIAN = 0, the conversion result becomes 000H.

When 0 < VIAN < AVREF1, conversion has 10-bit resolution.

When AVREF1

≤ VIAN ≤ AVDD, the conversion result becomes 3FFH.

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