TAS5036AIPFCRG4 datasheet(51/62 Pages) TI

tên linh kiện	TAS5036AIPFCRG4

Giải thích chi tiết về linh kiện	Six Channel Digital Audio PWM Processor

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Specifications

SLES061B—November 2002—Revised January 2004

TAS5036A

5.4.3 Serial Control Port—I2C Operation

5.4.3.1

Timing Characteristics for I2C Interface Signals Over Recommended Operating

Conditions (Unless Otherwise Noted)

PARAMETER

TEST CONDITIONS

STANDARD

MODE

FAST MODE

UNIT

PARAMETER

TEST CONDITIONS

MIN

MAX

MIN

MAX

UNIT

fSCL

Frequency, SCL

100

400

kHz

tw(H)

Pulse duration, SCL high

0.6

µs

tw(L)

Pulse duration, SCL low

4.7

1.3

µs

Rise time, SCL and SDA

1000

300

Fall time, SCL and SDA

300

tsu1

Setup time, SDA to SCL

250

100

th1

Hold time, SCL to SDA

t(buf)

Bus free time between stop and start condition

4.7

1.3

µs

tsu2

Setup time, SCL to start condition

4.7

0.6

µs

th2

Hold time, start condition to SCL

0.6

µs

tsu3

Setup time, SCL to stop condition

0.6

µs

Load capacitance for each bus line

400

SCLK

SDA

th1

tw(L)

tsu

tw(H)

Figure 5−12. SCL and SDA Timing

SCLK

SDA

th2

t(buf)

tsu2

tsu3

Start Condition

Stop Condition

Figure 5−13. Start and Stop Conditions Timing

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