PMR400UN

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© NXP B.V. 2012. All rights reserved.

Product data sheet

Rev. 2 — 2 February 2012

3 of 13

NXP Semiconductors

PMR400UN

N-channel TrenchMOS ultra low level FET

Fig 1.

Normalized continuous drain current as a

function of solder point temperature

Fig 2.

Normalized total power dissipation as a

function of solder point temperature

Fig 3.

Safe operating area; continuous and peak drain currents as a function of drain-source voltage

Tsp (°C)

0

200

150

50

100

03aa25

40

80

120

Ider

(%)

0

Tsp (°C)

0

200

150

50

100

03aa17

40

80

120

Pder

(%)

0

03ao06

10-2

10-1

1

10

10-1

1

10

102

VDS (V)

ID

(A)

DC

10 ms

Limit RDSon = VDS / ID

1 ms

tp = 10 μs

100 ms

100

μs