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ST7L19 bảng dữ liệu(PDF) 118 Page - STMicroelectronics |
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ST7L19 bảng dữ liệu(HTML) 118 Page - STMicroelectronics |
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118 / 138 page ![]() ST7L15, ST7L19 118/138 ELECTRICAL CHARACTERISTICS (cont’d) 13.9 CONTROL PIN CHARACTERISTICS 13.9.1 Asynchronous RESET Pin TA = -40 to +125°C, unless otherwise specified. Notes: 1. Data based on characterization results, not tested in production. 2. The IIO current sunk must always respect the absolute maximum rating specified in section 13.2.2 on page 99 and the sum of IIO (I/O ports and control pins) must not exceed IVSS. 3. The RON pull-up equivalent resistor is based on a resistive transistor. Specified for voltages on RESET pin between VILmax and VDD. 4. To guarantee the reset of the device, a minimum pulse must be applied to the RESET pin. All short pulses applied on RESET pin with a duration below th(RSTL)in can be ignored. Symbol Parameter Conditions Min Typ Max Unit VIL 1) Input low-level voltage Vss - 0.3 0.3xVDD V VIH 1) Input high-level voltage 0.7xVDD VDD + 0.3 Vhys Schmitt trigger voltage hysteresis1) 2 VOL 1) Output low-level voltage2) VDD =5V IIO = +5mA, TA ≤ +125°C 0.5 1.0 IIO = +2mA, TA ≤ +125°C 0.2 0.4 RON Pull-up equivalent resistor1)3) VDD = 5V 20 40 80 k Ω VDD =3.3V 1) 40 70 120 tw(RSTL)ou t Generated reset pulse duration Internal reset sources 30 µs th(RSTL)in External reset pulse hold time4) 20 tg(RSTL)in Filtered glitch duration 200 ns |
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