ST7L19 datasheet(74/138 Pages) STMICROELECTRONICS

74 / 138 page

ST7L15, ST7L19

74/138

LITE TIMER (cont’d)

11.3.4 Low Power Modes

11.3.5 Interrupts

Note: The TBxF and ICF interrupt events are con-

nected to separate interrupt vectors (see Inter-

rupts chapter).

They generate an interrupt if the enable bit is set in

the LTCSR1 or LTCSR2 register and the interrupt

mask in the CC register is reset (RIM instruction).

11.3.6 Register Description

LITE TIMER CONTROL/STATUS REGISTER 2

(LTCSR2)

Read / Write

Reset Value: 0000 0000 (00h)

Bits 7:2 = Reserved, must be kept cleared.

Bit 1 = TB2IE Timebase 2 Interrupt enable

This bit is set and cleared by software.

0: Timebase (TB2) interrupt disabled

1: Timebase (TB2) interrupt enabled

Bit 0 = TB2F Timebase 2 Interrupt Flag

This bit is set by hardware and cleared by software

reading the LTCSR register. Writing to this bit has

no effect.

0: No Counter 2 overflow

1: A Counter 2 overflow has occurred

LITE

TIMER

AUTORELOAD

(LTARR)

Read / Write

Reset Value: 0000 0000 (00h)

Bits 7:0 = AR[7:0] Counter 2 Reload Value

These bits register is read/write by software. The

LTARR value is automatically loaded into Counter

2 (LTCNTR) when an overflow occurs.

LITE TIMER COUNTER 2 (LTCNTR)

Read only

Reset Value: 0000 0000 (00h)

Bits 7:0 = CNT[7:0] Counter 2 Reload Value

This register is read by software. The LTARR val-

ue is automatically loaded into Counter 2 (LTCN-

TR) when an overflow occurs.

LITE TIMER CONTROL/STATUS REGISTER

(LTCSR1)

Read / Write

Reset Value: 0x00 0000 (x0h)

Bit 7 = ICIE Interrupt Enable

This bit is set and cleared by software.

0: Input Capture (IC) interrupt disabled

1: Input Capture (IC) interrupt enabled

Mode

Description

SLOW

No effect on Lite timer

(this peripheral is driven directly

by fOSC/32)

WAIT

No effect on Lite timer

ACTIVE HALT No effect on Lite timer

HALT

Lite timer stops counting

Interrupt

Event

Flag

Enable

Control

Bit

Exit

from

Wait

Exit

from

Active

Halt

Exit

from

Halt

Timebase 1

Event

TB1F

TB1IE

Yes

Timebase 2

Event

TB2F

TB2IE

IC Event

ICF

ICIE

TB2IE

TB2F

AR7AR7

AR3AR2

AR1

AR0

CNT7

CNT3

CNT2

CNT1

CNT0

ICIE

ICF

TB1IE

TB1F

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