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M41T82 bảng dữ liệu(PDF) 32 Page - STMicroelectronics

tên linh kiện M41T82
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M41T82 bảng dữ liệu(HTML) 32 Page - STMicroelectronics

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Clock operation
M41T82 M41T83
32/58
The on-chip capacitance can be calculated as follows:
For example:
CLOAD (12h = x0000000) = 12.5pF,
CLOAD (12h =11001000) = 3.5pF, and
CLOAD (12h = 00100111) = 17.4pF.
The oscillator sees a minimum of 3.5pF with no programmable load capacitance selected.
Note:
These are typical values, and the total load capacitance seen by the crystal will include
approximately 1-2pF of package and board capacitance in addition to the Analog Calibration
register value.
Any invalid value of Analog Calibration will result in the default capacitance of 25pF.
The combination of analog and digital trimming can give up to –93 to +156 ppm of the total
adjustment.
Figure 18 on page 33 represents a typical curve of clock ppm adjustment versus the Analog
Calibration value. This curve may vary with different crystals, so it is good practice to
evaluate the crystal to be used with an M41T8x device before establishing the adjustment
values for the application in question.
C
LOAD
1
2
--- AC6 AC0 value
decimal
,
() 0.25pF
×
[] 25pF
+
=



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