HT48R02 datasheet(6/38 Pages) HOLTEK

6 / 38 page

HT48R01/HT48R02/HT48R03

Rev. 1.00

December 20, 2006

Functional Description

Execution Flow

The system clock for the microcontroller is derived from

either a crystal or an RC oscillator. The system clock is

internally divided into four non-overlapping clocks. One

instruction cycle consists of four system clock cycles.

Instruction fetching and execution are pipelined in such

a way that a fetch takes an instruction cycle while de-

coding and execution takes the next instruction cycle.

However, the pipelining scheme causes each instruc-

tion to effectively execute in a cycle. If an instruction

changes the program counter, two cycles are required to

complete the instruction.

Program Counter

- PC

The program counter controls the sequence in which the

instructions stored in program memory are executed

and its contents specify the full range of program mem-

ory.

After accessing a program memory word to fetch an in-

struction code, the contents of the program counter are

incremented by one. The program counter then points to

the memory word containing the next instruction code.

When executing a jump instruction, conditional skip ex-

ecution, loading PCL register, subroutine call, initial re-

set, internal interrupt, external interrupt or return from

subroutine, the PC manipulates the program transfer by

loading the address corresponding to each instruction.

The conditional skip is activated by instructions. Once

the condition is met, the next instruction, fetched during

the current instruction execution, is discarded and a

dummy cycle replaces it to get the proper instruction.

Otherwise proceed with the next instruction.

The lower byte of the program counter (PCL) is a read-

able and writable register (06H). Moving data into the

PCL performs a short jump. The destination will be

within 256 locations.

When a control transfer takes place, an additional

dummy cycle is required.

T 1

T 2

T 3

T 4

T 1

T 2

T 3

T 4

T 1

T 2

T 3

T 4

F e t c h I N S T ( P C )

E x e c u t e I N S T ( P C - 1 )

F e t c h I N S T ( P C + 1 )

E x e c u t e I N S T ( P C )

F e t c h I N S T ( P C + 2 )

E x e c u t e I N S T ( P C + 1 )

P C

P C + 1

P C + 2

S y s t e m C l o c k

O S C 2 ( R C o n l y )

P C

Execution Flow

Mode

Program Counter

*11

*10

Initial Reset

000000000000

External Interrupt

000000000100

Timer/Event Counter Overflow

000000001000

Skip

Program Counter+2

Loading PCL

*11

*10

Jump, Call Branch

#11

#10

Return from Subroutine

S11

S10

Program Counter

Note: *11~*0: Program Counter bits

S11~S0: Stack register bits

#11~#0: Instruction code bits

@7~@0: PCL bits

For HT48R01, the Program Counter is 10 bits wide, i.e. from *9~*0

For HT48R02, the Program Counter is 11 bits wide, i.e. from *10~*0

For HT48R03, the Program Counter is 12 bits wide, i.e. from *11~*0

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