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NAND01GR3B2B bảng dữ liệu(PDF) 20 Page - STMicroelectronics

tên linh kiện NAND01GR3B2B
Giải thích chi tiết về linh kiện  1 Gbit, 2 Gbit, 2112 Byte/1056 Word Page, 1.8V/3V, NAND Flash Memory
PDF  62 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

NAND01GR3B2B bảng dữ liệu(HTML) 20 Page - STMicroelectronics

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Command Set
NAND01G-B2B, NAND02G-B2C
20/62
5
Command Set
All bus write operations to the device are interpreted by the Command Interface. The
Commands are input on I/O0-I/O7 and are latched on the rising edge of Write Enable when
the Command Latch Enable signal is high. Device operations are selected by writing
specific commands to the Command Register. The two-step command sequences for
program and erase operations are imposed to maximize data security.
The Commands are summarized in Table 10: Commands.
Table 10.
Commands
Command
Bus Write Operations(1)
1. The bus cycles are only shown for issuing the codes. The cycles required to input the
addresses or input/output data are not shown.
Commands
accepted
during
busy
1st CYCLE
2nd CYCLE 3rd CYCLE 4th CYCLE
Read
00h
30h
–
–
Random Data Output
05h
E0h
–
–
Cache Read
00h
31h
–
–
Exit Cache Read
34h
–
–
–
Yes(2)
2. Only during Cache Read busy.
Page Program
(Sequential Input default)
80h
10h
–
–
Random Data Input
85h
–
–
–
Copy Back Program
00h
35h
85h
10h
Cache Program
80h
15h
–
–
Block Erase
60h
D0h
–
–
Reset
FFh
–
–
–
Yes
Read Electronic Signature
90h
–
–
–
Read Status Register
70h
–
–
–
Yes



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