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UPD75P0116CU bảng dữ liệu(PDF) 30 Page - Renesas Technology Corp |
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UPD75P0116CU bảng dữ liệu(HTML) 30 Page - Renesas Technology Corp |
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30 / 63 page ![]() µPD75P0116 28 Data Sheet U12603EJ1V1DS 8. ONE-TIME PROM (PROGRAM MEMORY) WRITE AND VERIFY The program memory in the µPD75P0116 is a 16384 × 8-bit electronic write-enabled one-time PROM. The pins listed in the table below are used for this PROM’s write/verify operations. Clock input from the CL1 pins is used instead of address input as a method for updating addresses. Pin name Function VPP Pin (usually VDD) where programming voltage is applied during program memory write/verify CL1, CL2 Clock input to the CL1 pin for address updating during program memory write/verify. Leave the CL2 pin open. MD0/P30-MD3/P33 Operation mode selection pin for program memory write/verify D0/P40-D3/P43 (lower 4) 8-bit data I/O pin for program memory write/verify D4/P50-D7/P53 (higher 4) VDD Pin where power supply voltage is applied. Power voltage range for normal operation is 1.8 to 5.5 V. Apply 6.0 V for program memory write/verify. Caution Pins not used for program memory write/verify should be processed as follows. • All unused pins except XT2 ...... Connect to Vss via a pull-down resistor • XT2 pin ........................................ Leave open 8.1 Operation Modes for Program Memory Write/Verify When +6 V is applied to the µPD75P0116’s VDD pin and +12.5 V is applied to its VPP pin, program write/verify modes are in effect. Furthermore, the following detailed operation modes can be specified by setting pins MD0 to MD3 as shown below. Operation mode specification Operation mode VPP VDD MD0 MD1 MD2 MD3 +12.5 V +6 V H L H L Zero-clear program memory address LH HH Write mode LL HH Verify mode H × HH Program inhibit mode Remark ×: L or H |
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