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AD5539SQ/883B bảng dữ liệu(PDF) 12 Page - Analog Devices |
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AD5539SQ/883B bảng dữ liệu(HTML) 12 Page - Analog Devices |
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12 / 16 page ![]() AD5539 REV. B –12– Figure 35. Differential Gain and Phase Measurement Circuit Figure 36. Differential Gain and Phase Test Setup Figure 37. Differential Gain vs. Ramp Amplitude Figure 38. Differential Phase vs. Ramp Amplitude MEASURING AD5539 SETTLING TIME Measuring the very rapid settling times associated with AD5539 can be a real problem for the designer; proper component layout must be used and appropriate test equipment selected. In addi- tion, both cable dispersion (a function of cable losses) and the quality of termination (SWR) directly affect the measurement. The circuit of Figure 39 was used to make a “brute force” AD5539 settling time measurement. The fixture containing the circuit was connected directly—using a male BNC connector (but no cable)—onto the front of a 50 Ω input oscilloscope preamp. A digital mainframe was then used to capture, average, and expand the error signal. Most of the small-scale waveform aberrations shown on the figure were caused by the oscilloscope itself, especially the glitch at 15 ns. The pulse source used for this measurement was an EH-SPG2000 pulse generator set for a 1 ns rise-time; it was coupled directly to the circuit using 18" of microwave 50 Ω hard line. Figure 39. AD5539 Settling Time Test Circuit |
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