GWIXC1100BBT datasheet(92/134 Pages) INTEL

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Intel® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor

March 2005

Datasheet

Document Number: 252479, Revision: 005

Load capacitance

TDC

Duty cycle

Table 40.

Device Clock Timings (Crystal Reference)

Symbol

Parameter

Min.

Nom.

Max.

Units

Notes

VIH

Input-high voltage

1.9

VIL

Input-low voltage

1.6

TFREQUENCY

Clock frequency for IXP42X product

line and IXC1100 control plane

processors crystal or oscillator.

33.33

MHz

1, 4

FREQUENCY

Clock tolerance over -40º C to 85º C.

-50

ppm

ESR

Equivalent Series Resistance

Ω

CIN

Pin capacitance of IXP42X product line

and IXC1100 control plane processors’

inputs.

5pF

CSHUNT

CSHUNT is a crystal parameter

sometimes referred to as the holder

capacitance.

Load capacitance

TDC

Duty cycle

Notes:

IMPORTANT NOTE: Please refer to the product specification update regarding new crystal specifications.

This value could be an oscillator input or a series resonant frequency from a crystal. If used as an

oscillator input, tie to the crystal input pin and leave the crystal output pin disconnected.

Use the component values recommended by the crystal manufacturer.

This parameter applies when driving the clock input with an oscillator.

Where the IXP42X product line or IXC1100 control plane processor is configured with an input

reference-clock, the slew rate should never be faster than 2.5 V/nS to ensure proper PLL operation.

To help ensure proper PLL operation at the slower slew rate, the VIH and VIL voltage levels need to

be within the specified range at an input clock frequency of 33.33 MHz.

Table 39.

Device Clock Timings (Oscillator Reference) (Sheet 2 of 2)