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4LS bảng dữ liệu(PDF) 70 Page - ams AG |
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4LS bảng dữ liệu(HTML) 70 Page - ams AG |
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70 / 115 page ![]() Document Feedback 4LS Register Description Datasheet • PUBLIC DS000542 • v3-01 • 2022-Nov-17 114 │ 69 Figure 111 Total Number of LVDS Drivers per 2K5 Segment Top Side Bottom Side Total Number of LVDS (per 2K5 segment) LVDS Driver Data Clock LVDS Driver Data LVDS Driver Data Clock LVDS Driver Data 1-To-1 1 8 1 8 18 2-To-1 1 4 1 4 10 4-To-1 1 2 1 2 6 9.1.14 Test Multiplexer Register (Address 0x0D) This register sets the output of test analogue pad to a certain signal. Figure 112: TMXReg Address: 0x0D Default Value: 0x00 Access: Read/Write Bit Bit Name Default Bit Description 7:5 N/A 00b Not used. 4:0 Test Multiplexer output select 000000b Internal Debug Purposes Defines the output of the test multiplexer to a specific test signal. 9.1.15 Test Mode Register (Address 0x0E) This register sets the CIS to defined states, so that some tests can be performed to debug/check some blocks and operational conditions. Figure 113: TMDReg Address: 0x0E Default Value: 0x30 Access: Read/Write Bit Bit Name Default Bit Description 7:6 N/A 00b Not used. 5 Auto Transfer 1b Internal Debug Purposes When set to ‘1’ increases the time to transfer data from shadow to effective memory. |
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