MC68340 datasheet(202/441 Pages) FREESCALE

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MOTOROLA

MC68340 USER’S MANUAL

5- 65

memory access. Off-chip address comparators will not detect breakpoints on internal

accesses unless show cycles are enabled. Breakpoints on prefetched instructions, which

are flushed from the pipeline before execution, are not acknowledged, but operand

breakpoints are always acknowledged. Acknowledged breakpoints can initiate either

exception processing or BDM. See 5.5.2.6 Hardware Breakpoints for more information.

5.6.2 Background Debug Mode

BDM is an alternate CPU32 operating mode. During BDM, normal instruction execution is

suspended, and special microcode performs debugging functions under external control.

Figure 5-20 is a BDM block diagram.

BDM can be initiated in several ways—by externally generated breakpoints, by internal

peripheral breakpoints, by the background instruction (BGND), or by catastrophic

exception conditions. While in BDM, the CPU32 ceases to fetch instructions via the

parallel bus and communicates with the development system via a dedicated, high-speed,

SPI-type serial command interface.

. . ....

SEQUENCER

MICROCODE

SERIAL

INTERFACE

BUS

CONTROL

IRC

BERR

BKPT

EXECUTION

UNIT

IPIPE/DSO

IFETCH/DSI

DATA BUS

BERR

BKPT/DSCLK

ADDRESS BUS

IRB

BERR

BKPT

BERR

BKPT

FREEZE

Figure 5-20. BDM Block Diagram

5.6.2.1 ENABLING BDM. Accidentally entering BDM in a nondevelopment environment

could lock up the CPU32 since the serial command interface would probably not be

available. For this reason, BDM is enabled during reset via the

BKPT signal.

Freescale Semiconductor, Inc.

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Go to: www.freescale.com

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